Trait libreda_sta::traits::interconnect_delay_model::InterconnectDelayModel

pub trait InterconnectDelayModel<N: NetlistBase>: DelayBase {
    // Required method
    fn interconnect_output(
        &self,
        netlist: &N,
        source_terminal: &TerminalId<N>,
        input_signal: &Self::Signal,
        target_terminal: &TerminalId<N>,
        output_load: &Self::Load
    ) -> Option<Self::Signal>;
}

Define the computation of the interconnect delay.

Required Methods

fn interconnect_output( &self, netlist: &N, source_terminal: &TerminalId<N>, input_signal: &Self::Signal, target_terminal: &TerminalId<N>, output_load: &Self::Load ) -> Option<Self::Signal>

Compute the cell delay from the source_terminal to the target_terminal.

Returns the output signal at the target_terminal or None if there is no delay arc from the selected source to the selected target.

Implementors

impl<'a, D, N: NetlistBase> InterconnectDelayModel<N> for ZeroInterconnectDelayModel<'a, D>where D: DelayBase,