Trait arboreus_cts::simple_clock_tree::SimpleClockTreeGenerator

pub trait SimpleClockTreeGenerator<LN: L2NEdit> {
    type Error;

    // Required method
    fn create_unrouted_clock_trees(
        &self,
        chip: &mut LN,
        clock_tree_specifications: Vec<&dyn SimpleClockTreeSpecification<LN>>
    ) -> Result<HashMap<LN::NetId, (Vec<LN::CellInstId>, Vec<LN::NetId>)>, Self::Error>;
}

Simple clock-tree synthesis engine.

Required Associated Types

type Error

Error happening during clock-tree synthesis.

Required Methods

fn create_unrouted_clock_trees( &self, chip: &mut LN, clock_tree_specifications: Vec<&dyn SimpleClockTreeSpecification<LN>> ) -> Result<HashMap<LN::NetId, (Vec<LN::CellInstId>, Vec<LN::NetId>)>, Self::Error>

Create unrouted clock trees based on given clock source nets and target skews. Typically an implementation inserts buffer trees and assigns locations to the buffer gates.

Parameters

• chip: A mutable reference to a fused netlist-layout struct.
• clock_tree_specifications: Definitions of the clock-trees to be generated.

Return

Returns for each clock net a list of cell instances (e.g. buffers) and nets of the clock tree.

Implementors

impl<'a, LN, BufferEngine, Legalizer, Router> SimpleClockTreeGenerator<LN> for SimpleCTS<'a, LN, BufferEngine, Legalizer, Router>where LN: L2NEdit<Coord = Coord>, BufferEngine: SimpleBufferInsertion<LN>, LN::Coord: PrimInt, Legalizer: SimpleStdCellLegalizer<LN>, Router: SimpleRouter,

type Error = ()