Struct arboreus_cts::simple_clock_tree::SimpleCTS

pub struct SimpleCTS<'a, LN, BufferEngine, Legalizer, Router>where
    LN: L2NEdit,
    LN::Coord: PrimInt,
    BufferEngine: SimpleBufferInsertion<LN>,
    Legalizer: SimpleStdCellLegalizer<LN>,
    Router: SimpleRouter,{
    buffer_tree_engine: &'a BufferEngine,
    _legalizer: &'a Legalizer,
    _router: &'a Router,
    netlist_layout_type: PhantomData<LN>,
}

Simple clock-tree synthesis engine. Assembles a buffer insertion engine, a legalizer and a router into a clock-tree generator.

Fields

buffer_tree_engine: &'a BufferEngine

_legalizer: &'a Legalizer

_router: &'a Router

netlist_layout_type: PhantomData<LN>

Trait Implementations

impl<'a, LN, BufferEngine, Legalizer, Router> SimpleClockTreeGenerator<LN> for SimpleCTS<'a, LN, BufferEngine, Legalizer, Router>where LN: L2NEdit<Coord = Coord>, BufferEngine: SimpleBufferInsertion<LN>, LN::Coord: PrimInt, Legalizer: SimpleStdCellLegalizer<LN>, Router: SimpleRouter,

type Error = ()

Error happening during clock-tree synthesis.

fn create_unrouted_clock_trees( &self, chip: &mut LN, clock_tree_specifications: Vec<&dyn SimpleClockTreeSpecification<LN>> ) -> Result<HashMap<LN::NetId, (Vec<LN::CellInstId>, Vec<LN::NetId>)>, Self::Error>

Create unrouted clock trees based on given clock source nets and target skews. Typically an implementation inserts buffer trees and assigns locations to the buffer gates.