Module libreda_sta::models

Model implementations (cell delay and constraints, interconnect delays).

Modules

• clock_tracking 🔒
  Wrap delay/constraint models and add the capability for keeping track of clock sources which drive a signal.
• constant_cell_delay 🔒
  Cell model which outputs a constant delay for each cell delay arc.
• ndlm_cell_delay
  Implementation of the CellDelayModel using the non-linear delay model (NDLM) with data from a liberty library.
• zero_interconnect_delay
  Dummy implementation of an interconnect delay model: The delay is always zero.