ASIC place-and-route framework.
This crate contains interface definitions for place-and-route related algorithms.
The core idea of the framework is to enable independent development of place & route engines which then can easily be plugged together.
place- interfaces for placement engines and representations of placement problems
rebuffer- interface for buffer insertion engines
route- interfaces for routing engines
timing_analysis- interfaces for static timing-analysis (STA) engines
technology- interfaces for accessing technology related information such commonly used DRC rules
util- useful functions which don’t yet have their own category
Interface definitions for legalization engines (also known as detail placement).
Metrics and statistics for evaluating placement & routing quality.
Interface definitions for placement related algorithms.
Trait definitions for re-buffering of high-fanout nets. This includes clock-tree and buffer-tree generators.
Interface definitions for routing related algorithms.
Traits and datastructures for the representation of technology related properties, especially design rules.
Interfaces for timing analysis engines.
Collection of utility functions.