Trait libreda_db::netlist::traits::NetlistBase[][src]

pub trait NetlistBase: HierarchyBase {
    type PinId: Eq + Hash + Clone + Debug;
    type PinInstId: Eq + Hash + Clone + Debug;
    type NetId: Eq + Hash + Clone + Debug;
Show methods fn template_pin(&self, pin_instance: &Self::PinInstId) -> Self::PinId;
fn pin_direction(&self, pin: &Self::PinId) -> Direction;
fn pin_name(&self, pin: &Self::PinId) -> Self::NameType;
fn pin_by_name(
        &self,
        parent_circuit: &Self::CellId,
        name: &str
    ) -> Option<Self::PinId>;
fn parent_cell_of_pin(&self, pin: &Self::PinId) -> Self::CellId;
fn parent_of_pin_instance(
        &self,
        pin_inst: &Self::PinInstId
    ) -> Self::CellInstId;
fn parent_cell_of_net(&self, net: &Self::NetId) -> Self::CellId;
fn net_of_pin(&self, pin: &Self::PinId) -> Option<Self::NetId>;
fn net_of_pin_instance(
        &self,
        pin_instance: &Self::PinInstId
    ) -> Option<Self::NetId>;
fn net_zero(&self, parent_circuit: &Self::CellId) -> Self::NetId;
fn net_one(&self, parent_circuit: &Self::CellId) -> Self::NetId;
fn net_by_name(
        &self,
        parent_circuit: &Self::CellId,
        name: &str
    ) -> Option<Self::NetId>;
fn net_name(&self, net: &Self::NetId) -> Option<Self::NameType>;
fn for_each_pin<F>(&self, circuit: &Self::CellId, f: F)
    where
        F: FnMut(Self::PinId)
;
fn for_each_pin_instance<F>(&self, circuit_inst: &Self::CellInstId, f: F)
    where
        F: FnMut(Self::PinInstId)
;
fn for_each_internal_net<F>(&self, circuit: &Self::CellId, f: F)
    where
        F: FnMut(Self::NetId)
;
fn num_pins(&self, circuit: &Self::CellId) -> usize;
fn for_each_pin_of_net<F>(&self, net: &Self::NetId, f: F)
    where
        F: FnMut(Self::PinId)
;
fn for_each_pin_instance_of_net<F>(&self, net: &Self::NetId, f: F)
    where
        F: FnMut(Self::PinInstId)
; fn pin_instance(
        &self,
        cell_inst: &Self::CellInstId,
        pin: &Self::PinId
    ) -> Self::PinInstId { ... }
fn net_of_terminal(
        &self,
        terminal: &TerminalId<Self>
    ) -> Option<Self::NetId> { ... }
fn each_pin_vec(&self, circuit: &Self::CellId) -> Vec<Self::PinId> { ... }
fn each_pin<'a>(
        &'a self,
        circuit: &Self::CellId
    ) -> Box<dyn Iterator<Item = Self::PinId> + 'a> { ... }
fn each_pin_instance_vec(
        &self,
        circuit_instance: &Self::CellInstId
    ) -> Vec<Self::PinInstId> { ... }
fn each_pin_instance<'a>(
        &'a self,
        circuit_instance: &Self::CellInstId
    ) -> Box<dyn Iterator<Item = Self::PinInstId> + 'a> { ... }
fn each_external_net<'a>(
        &'a self,
        circuit_instance: &Self::CellInstId
    ) -> Box<dyn Iterator<Item = Self::NetId> + 'a> { ... }
fn for_each_external_net<F>(
        &self,
        circuit_instance: &Self::CellInstId,
        f: F
    )
    where
        F: FnMut(Self::NetId)
, { ... }
fn each_external_net_vec(
        &self,
        circuit_instance: &Self::CellInstId
    ) -> Vec<Self::NetId> { ... }
fn each_internal_net_vec(&self, circuit: &Self::CellId) -> Vec<Self::NetId> { ... }
fn each_internal_net<'a>(
        &'a self,
        circuit: &Self::CellId
    ) -> Box<dyn Iterator<Item = Self::NetId> + 'a> { ... }
fn num_internal_nets(&self, circuit: &Self::CellId) -> usize { ... }
fn num_net_pins(&self, net: &Self::NetId) -> usize { ... }
fn num_net_pin_instances(&self, net: &Self::NetId) -> usize { ... }
fn num_net_terminals(&self, net: &Self::NetId) -> usize { ... }
fn each_pin_of_net_vec(&self, net: &Self::NetId) -> Vec<Self::PinId> { ... }
fn each_pin_of_net<'a>(
        &'a self,
        net: &Self::NetId
    ) -> Box<dyn Iterator<Item = Self::PinId> + 'a> { ... }
fn each_pin_instance_of_net_vec(
        &self,
        net: &Self::NetId
    ) -> Vec<Self::PinInstId> { ... }
fn each_pin_instance_of_net<'a>(
        &'a self,
        net: &Self::NetId
    ) -> Box<dyn Iterator<Item = Self::PinInstId> + 'a> { ... }
fn for_each_terminal_of_net<F>(&self, net: &Self::NetId, f: F)
    where
        F: FnMut(TerminalId<Self>)
, { ... }
fn each_terminal_of_net_vec(
        &self,
        net: &Self::NetId
    ) -> Vec<TerminalId<Self>> { ... }
fn each_terminal_of_net<'a>(
        &'a self,
        net: &Self::NetId
    ) -> Box<dyn Iterator<Item = TerminalId<Self>> + 'a> { ... }
}
Expand description

Most basic trait for traversing a netlist. A netlist extends the HierarchyBase and hence is hierarchical. NetlistBase extends the components of the hierarchy with pins and nets. Each cell can have pins. Each cell instance has pin instances that correspond one-to-one to the pins of the template cell. Cells can contain nets. Each pin and each pin instance can be connected to one or zero nets. A net can be connected to an arbitrary number of pins and pin instances.

Pins must have a name and also a signal direction.

Nets can have a name.

Associated Types

Pin identifier type. Uniquely identifies a pin in the whole netlist.

Pin instance identifier type. Uniquely identifies a pin instance in the whole netlist. A pin instance is a pin of a circuit instance.

Net identifier type. Uniquely identifies a net in the whole netlist.

Required methods

Get the ID of the template pin of this pin instance.

Get the signal direction of the pin.

Get the name of the pin.

Find a pin by its name. Returns None if no such pin can be found.

Get the ID of the parent circuit of this pin.

Get the ID of the circuit instance that holds this pin instance.

Get the ID of the parent circuit of this net.

Get the internal net attached to this pin.

Get the external net attached to this pin instance.

Get the net of the logical constant zero.

Get the net of the logical constant one.

Find a net by its name inside the parent circuit. Returns None if no such net can be found.

Get the name of the net.

Call a function for each pin of the circuit.

Call a function for each pin instance of the circuit instance.

Call a function for net of the circuit.

Get the number of pins of a circuit.

Call a function for each pin connected to this net.

Call a function for each pin instance connected to this net.

Provided methods

Get the ID of a pin instance given the cell instance and the pin ID.

Get the net that is attached to this terminal.

Get a Vec with the IDs of all pins of this circuit.

Iterate over all pins of a circuit.

Get a Vec with the IDs of all pin instance of this circuit instance.

Iterate over all pin instances of a circuit.

Iterate over all external nets connected to the circuit instance. A net might appear more than once.

Iterate over all external nets connected to the circuit instance. A net might appear more than once.

Get a vector of all external nets connected to the circuit instance. A net might appear more than once.

Get a Vec with all nets in this circuit.

Iterate over all defined nets inside a circuit.

Return the number of nets defined inside a cell.

Get the number of pins that are connected to this net.

Get the number of pin instances that are connected to this net.

Get the number of terminals that are connected to this net.

Get a Vec with all pin IDs connected to this net.

Iterate over all pins of a net.

Get a Vec with all pin instance IDs connected to this net.

Iterate over all pins of a net.

Call a function for each terminal connected to this net.

Get a Vec with all terminal IDs connected to this net.

Iterate over all terminals of a net.

Implementors