pub fn create_clock_trees<LN, B, L, R>(
    chip: &mut LN,
    buffer_engine: &B,
    legalizer: &L,
    router: &R,
    clock_nets: &Vec<LN::NetId>,
    core_area: &SimplePolygon<LN::Coord>,
    cell_outlines: &HashMap<LN::CellId, Rect<LN::Coord>>,
    routing_layers: &Vec<LN::LayerId>,
    via_layers: &Vec<LN::LayerId>
) -> Result<HashMap<LN::NetId, (Vec<LN::CellInstId>, Vec<LN::NetId>)>, ()>where
    LN: L2NEdit<Coord = Coord>,
    LN::Coord: PrimInt,
    B: SimpleBufferInsertion<LN>,
    L: SimpleStdCellLegalizer<LN>,
    R: SimpleRouter,
Expand description

Create clock trees for a set of clock nets by inserting placement-aware buffer trees. Routes the clock nets.

Returns on success a hash map which maps the original clock nets to the new buffers and new nets that were created for this clock tree.